AS1123
Datasheet - A p p l i c a t i o n I n f o r m a t i o n
Constant Current
In LED display applications, the AS1123 provides virtually no current variations from channel-to-channel and from AS1123-to-AS1123. This is
mostly due to 2 factors:
While I OUT 3 10mA, the maximum current skew is less than ±3% between channels and less than ±3% between AS1123 devices.
In the saturation region, the characteristic curve of the output stage is flat. Thus, the output current can be kept constant regardless of the
variations of LED forward voltages (V F ).
Adjusting Output Current
The AS1123 scales up the reference current (I REF ) set by external resistor (R EXT ) to sink a current (I OUT ) at each output port. As shown the
output current in the saturation region is extremely flat so that it is possible to define it as target current (I OUT TARGET ). I OUT TARGET can be
calculated by:
V REXT = 1.253V
I REF = V REXT /R EXT (if the other end of R EXT is connected to ground)
I OUT TARGET = I REF *15 = (1.253V/R EXT )*15
Where:
R EXT is the resistance of the external resistor connected to pin REXT.
V REXT is the voltage on pin REXT.
The magnitude of current (as a function of R EXT ) is around 40mA at 470 ? and 20mA at 940 ? .
Package Power Dissipation
The maximum allowable package power dissipation (PD) is determined as:
P D(MAX) = (T J -T AMB )/R TH(J-A)
When 16 output channels are turned on simultaneously, the actual package power dissipation is:
P D(ACT) = (I DD *V DD ) + (I OUT *Duty*V DS *16)
Therefore, to keep P D(ACT) ≤ P D(MAX) , the maximum allowed output current as a function of duty cycle is:
I OUT = {[(T J -T AMB )/R TH(J-A) ]-(I DD *V DD )}/V DS /Duty/16
(EQ 1)
(EQ 2)
(EQ 3)
(EQ 4)
(EQ 5)
(EQ 6)
Where:
T J = -40°C to +125°C
Delayed Outputs (only for AS1123B)
The AS1123B has graduated delay circuits between outputs. These delay circuits can be found between OUTN n and the constant current block.
The fixed delay time is 20 ns (typ) where OUTN0:3 has no delay, OUTN4:7 has 20ns delay, OUTN8:11 has 40ns delay and OUTN12:15 has
60ns delay. This delay prevents large inrush currents, which reduce power supply bypass capacitor requirements when the outputs turn on.
Switching-Noise Reduction
LED drivers are frequently used in switch-mode applications which normally exhibit switching noise due to parasitic inductance on the PCB.
Load Supply Voltage
Considering the package power dissipation limits, the AS1123 should be operated within the range of V DS = 0.4 to 1.0V.
For example, if V LED is higher than 5V, V DS may be so high that P D(ACT) > P D(MAX) where V DS = V LED - V F . In this case, the lowest possible
supply voltage or a voltage reducer (V DROP ) should be used. The voltage reducer allows
V DS = (V LED -V F ) - V DROP .
Note: Resistors or zener diodes can be used as a voltage reducer as shown in Figure 23 on page 19 .
www.austriamicrosystems.com/LED-Driver-ICs
Revision 1.00
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